(1) Field of the Invention
The invention relates to the fabrication of integrated circuit devices, and more particularly, to a method of forming a resistive load element in the fabrication of integrated circuits.
(2) Description of the Prior Art
In integrated circuit fabrication, some integrated circuits, such as a static random access memory (SRAM), require a resistive load. A resistive load element can be fabricated using a lightly doped polysilicon with both ends connected to other circuitry through a contact. The other circuitry could be metal or polysilicon interconnect or N+ diffusion line characteristic of low resistance. The lightly doped polysilicon with high resistance serves as a resistor. Its resistance is determined by its doping concentration as well as its dimension. In a typical SRAM cell, the resistor load needs to make simultaneous contact to the gate electrode and to the drain (N+) of the pull-down transistor as well as to the metal line to pass gate transistor. A resistor tab making contact with a gate and a drain region needs sufficient dopant at the interface to ensure an ohmic contact. However, when a contact opening is etched to the drain region in the semiconductor substrate, a large amount of dopant at the surface of the drain region is removed. The majority of the dopant is at the surface because the etch is performed before the dopant has been driven in by a high temperature step. In a conventional process, the resistor is lightly doped to define resistor value, then tabs on either side of the resistor are opened up in a mask for a high dose implant. The mask defines the resistor length.
U.S. Pat. Nos. 5,348,901 to Chen et al and 5,196,233 to Chan et al describe methods of forming resistive load elements.